The present invention relates to a composite material and a manufacturing method of the composite material. More specifically, the present invention pertains to a composite material that is suitable for a cooling substrate on which electronic elements, such as semiconductors, are mounted, or a composite material that is suitable for wiring material of semiconductors. The present invention also pertains to manufacturing methods of the composite materials.
Typical electronic elements such as semiconductors generate heat when supplied with electric current. The electronic elements are cooled to prevent the performance from deteriorating.
Packaging methods of a semiconductor include the use of a heat sink. FIG. 16 shows an aluminum base 41, which constitute a casing, and a heat sink 42, which is secured to the aluminum base 41 by screws (not shown) or by soldering. An insulated-substrate 43 is secured to the heat sink 42 by soldering. The insulated-substrate 43 has metal (A1) layers 43a on both sides. An electronic element 44, such as a semiconductor, is mounted on one of the metal layers 43a of the insulated-substrate 43 by soldering. The insulated-substrate 43 is made of aluminum nitride (AlN). The heat sink 42 uses material having low coefficient of thermal expansion and high coefficient of thermal conductivity. The material may be metal matrix composite material having a metal matrix phase to which ceramics are dispersed. The metal matrix composite material may be, for example, an aluminum substrate to which silicon carbide (Sic) particles are dispersed.
The metal matrix composite material used for the heat sink 42 is expensive and has low workability. Therefore, a different cooling substrate that is inexpensive and has high workability has been proposed. For example, Japanese Laid-Open Patent Publication No. 6-77365 discloses a cooling substrate 47, which is integrally formed with metal plates 46 and a wire fabric 45 as shown in FIGS. 17(a) and 17(b). The metal plates 46 are made of copper, copper and tungsten, or copper and molybdenum. The wire fabric 45 is woven with thin metal wires made of molybdenum or tungsten. The metal plates 46 are laid on one another with the wire fabric 45 arranged in between. In this state, the metal plates 46 and the wire fabric 45 are heated and rolled. This integrates the metal plates 46 and the wire fabric 45 and forms a laminated sheet of the cooling substrate 47.
Japanese Laid-Open Patent Publication No. 7-249717 discloses a cooling substrate that is formed by integrating a wire fabric made of thin metal wires of molybdenum or tungsten with impregnant containing copper, copper and tungsten, or copper and molybdenum.
Japanese Laid-Open Patent Publication No. 6-334074 discloses a substrate for semiconductors as shown in FIG. 18. The substrate includes a base material 48, in which holes 48a are formed. The base material 48 is made of metal or alloy, the coefficient of thermal expansion of which is less than or equal to 8×10−6/degrees Celsius. The holes 48a are filled with highly thermal conductive material made of metal or alloy, the coefficient of thermal conductivity of which is greater than or equal to 210 W/(m×K). The highly thermal conductive material may be Cu, Al, Ag, Au or an alloy that mainly includes Cu, Al, Ag, or Au. The base material 48 may be an invar alloy, which contains 30 to 50% Ni by weight and Fe making up the remaining proportion, or a super invar alloy, which includes Co. The holes 48a of the base material 48 are made by punching after processing the raw material into flat shape, or the holes 48a are formed during casting by the precision casting (lost-wax process).
In a semiconductor, a silicon chip (silicon element) needs to be connected to other electrode directly or via a pad located on the silicon chip with wiring. In general, wiring material, such as aluminum wire, is used for wiring. However, when the wiring material is used, the element might be damaged during wire bonding. Further, when the temperature is increased due to heat generation during operation of the semiconductor, joint portions might be deteriorated or disconnected by the thermal stress caused by the difference between the thermal expansion of the wire and the silicon element.
To solve the above mentioned problem, Japanese Patent Publication No. 3216305 discloses a semiconductor having bonding pads. The bonding pads are located on a semiconductor layer, which serves as an active region of a semiconductor element. The bonding pads are electrically connected to electrodes outside the silicon element. The bonding pads of the semiconductor are connected to each other with plate-shaped conductive members.
When the cooling substrate 47 shown in FIG. 17(b) is rolled, spaces Δ are easily formed at portions where the thin metal wires 45a of the wire fabric 45 overlap with each other and in the vicinity of the overlapped portions as shown in FIG. 19, which is an enlarged partial cross sectional view of FIG. 17(b). As a result, air in the space Δ deteriorates the heat conductivity. Also, cracks are easily formed in the wire fabric 45 at the spaces Δ by the repeated thermal expansion and thermal contraction, which reduces the strength. To improve the strength of the wire fabric 45, the contact points of the thin metal wires 45a may be welded. However, it is difficult to weld the contact points of the wire fabric 45, since the wire fabric 45 is woven with the thin metal wires 45a and has fine mesh.
FIG. 20(b) illustrates a cooling substrate 51 according to another prior art. The cooling substrate 51 includes a flat metal plate 49. The metal plate 49 includes partitions 49b, which are arranged at predetermined intervals. Holes 49a are defined between the adjacent partitions 49b. The metal plate 49 is covered with a metal 50, which has higher coefficient of thermal expansion than the metal plate 49.
It is required to maximize the volumetric proportion of metal having low coefficient of thermal expansion to suppress the coefficient of thermal expansion of the cooling substrate. To suppress the coefficient of thermal expansion of the cooling substrate 47 shown in FIGS. 17(a), 17(b), 19, and 20(a), the wire fabric 45, which is woven with the thin metal wires 45a having low coefficient of thermal expansion, is used. However, when rolling, the metal plates 46, which have higher coefficient of thermal expansion than the thin metal wires 45a, cover the wire fabric 45 and enter portions 47a (see FIG. 20(a)) that correspond to bent portions of the thin metal wires 45a in addition to the meshes of the wire fabric 45. On the other hand, in the case with the cooling substrate 51 shown in FIG. 20(b), the metal 50 enters the holes 49a that correspond to the mesh of the wire fabric 45 shown in FIG. 20(a) and around the longitudinal ends of the metal plates 49. The longitudinal ends of each metal plate 49 are flat. Therefore, the metal that corresponds to the metal plates 46 that exist at the portions 47a shown in FIG. 20(a) does not exist in the cooling substrate 51 shown in FIG. 20(b). That is, the proportion of metal having high coefficient of thermal expansion in the cooling substrate 47 shown in FIG. 20(a) is greater than in the case with the cooling substrate 51 shown in FIG. 20(b) by the amount corresponding to the bent portions.
In the case where holes are formed by punching after processing a raw material into flat shape as the substrate for semiconductors shown in FIG. 18, the yield rate decreases, which increases the material cost. Also, forming the holes by precision casting (lost wax) increases the manufacturing cost.
In the process disclosed in Japanese Patent Publication No. 3216305, the difference between the coefficient of thermal expansion of the semiconductor element and the coefficient of thermal expansion of the plate-shaped conductive material is great. Thus, the thermal stress caused by heat generation during operation of the semiconductor might disconnect the wiring of the plate-shaped conductive material.